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Event Entry

What and Who

Code Generation for Digital Signal Processors

Daniel Kästner
Universität des Saarlandes
Seminar des Graduiertenkollegs
AG 1, AG 2  
AG Audience
English

Date, Time and Location

Monday, 25 May 98
16:00
60 Minutes
45
016
Saarbrücken

Contact

Uelke Coruh
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Tags, Category, Keywords and additional notes

In the area of code generation for general purpose processors,

traditionally fast, graph-based heuristics are used. However code
generation for digital signal processors is subject to considerable
performance and cost restrictions. So, there is a trend to the use of
highly optimizing algorihms putting up with higher compilation
times. In my talk, I will oppose the use of integer linear
programming to the traditional approaches. A suitable
ILP-formulation is presented along with some approximation techniques
which can be used in order to reduce runtime. Experimetal
results will be presented for a standard DSP as target architecture.
Furthermore, I will give an outline of how these results can be
exploited to integrate ILP-based methods in a retargetable
compiler framework.