Up-to-date microprocessors provide fast I/O, virtual memory and support the full IEEE floating point standard. All that calls for a powerful interrupt mechanism. The design of such a mechanism is one of the main design challenges in a processor. This task becomes even more complex in processors with out-of-order execution. In order to make the interrupts precise, the processor must have a recovery mechanism which reestablishes the in-order state. In commercial microprocessors, the problem of combining precise interrupts and out-of-order execution was first solved in 1995. In this talk, we present several mechanisms for the solution of this problem: the reorder buffer, the future file and the history buffer.