The Future of Many Core Processors - A Tale of Two Processors
Timothy Mattson
Intel Labs
Talk
Tim Mattson is a parallel programmer (Ph.D. Chemistry, UCSC, 1985). His professional goal is to do whatever it takes to meet the needs of parallel application programmers. Tim has been with Intel since 1993 where he has worked with brilliant people on great projects such as: (1) the first TFLOP computer (ASCI Red), (2) the OpenMP API for shared memory programming, (3) the OpenCL programming language for heterogeneous platforms, (4) Intel's first TFLOP chip (the 80 core research chip), and (5) Intel's 48 core, SCC research processor. Tim has published extensively including the books Patterns for Parallel Programming (with Beverly Sanders and Berna Massingill, Addison Wesley, 2004) and An Introduction to Concurrency in Programming Languages (with Matthew J. Sottile and Craig E Rasmussen, CRC Press, 2009).
Ours is a many-core future. That much is clear. What is unclear is how those cores will be connected, what memory architecture will these processors use, and how will we program these systems.
It is the answers to those questions that will define the shape of our many-core future. In this talk, we will explore these questions through the lens of the two most recent research processors from Intel; the 80-core terascale processor (2007) and the recently announced 48 core SCC processor.
You may have heard other talks on the SCC processor, but this talk stands apart by its focus on how we actually program these chips. We will close with some thoughts on the implications of our work on how programming models must adapt to prepare for a future dominated by many-core processors.