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Event Entry

What and Who

Verification of Realtime Systems

Prof. Wolfgang Paul
Fachrichtung Informatik - Saarbrücken
Ringvorlesung
AG 1, AG 3, AG 5, AG 2, AG 4, SWS  
Public Audience
English

Date, Time and Location

Thursday, 8 February 2007
13:00
60 Minutes
E1 3 - Hörsaal Gebäude
016
Saarbrücken

Abstract

We outline the correctness proof for the hardware of a distributed real

time system from the gates until the assembler level.
This requires to argue simultaneously about i) hardware models with
different clock domains ii) serial interfaces iii) clock synchronisation
algorithms and iv) processor correctness. Then we outline how to obtain
formal correctnes proofs for distributed applications running on such
systems by combining i) ordinary correctness proofs for the local
computations and ii) worst case execution time analysis.

Contact

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Arno Eigenwillig, 02/02/2007 13:35
Veronika Weinand, 11/21/2006 10:42
Silke Wagner, 11/06/2006 16:17
Veronika Weinand, 11/06/2006 14:39
Veronika Weinand, 11/03/2006 12:21
Veronika Weinand, 10/25/2006 15:08
Veronika Weinand, 10/24/2006 12:47
Veronika Weinand, 10/23/2006 15:06
Veronika Weinand, 10/19/2006 14:54
Veronika Weinand, 10/16/2006 17:07