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What and Who
Title:Metastability-Containing Sorting Networks
Speaker:Johannes Bund
coming from:Fachrichtung Informatik - Saarbrücken
Speakers Bio:
Event Type:AG1 Mittagsseminar (own work)
Visibility:D1, D2, D3, D4, D5, RG1, SWS, MMCI
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Level:AG Audience
Date, Time and Location
Date:Wednesday, 23 November 2016
Duration:30 Minutes
Building:E1 4
The talk is about my contribution to the paper "Near-Optimal Metastability-Containing Sorting Networks" by Bund, Lenzen and Medina.

Metastability-Containing sorting networks serve as a central building block in fault-tolerant clock-synchronization algorithms on chip.

In this paper we designed and analyzed, both theoretically and via simulations, a metadtability-containing sorting network.

Informally, a metastable-containing combinational circuit is a circuit that can handle metastable inputs and still produces meaningful outputs.

My thesis deals with the implementation of the circuit, testing it and
comparing it with similar circuits.
I clarify how requiring metastability containment affects the design process of a microchip.
As we go along we find a way to transform a "theoretical" circuit to a netlist of real hardware cells.

Name(s):Moti Medina
Video Broadcast
Video Broadcast:NoTo Location:
Tags, Category, Keywords and additional notes
Keywords:Bachelor’s Thesis presentation
Note:Supervised by Matthias Függer and Moti Medina
Attachments, File(s):

Moti Medina, 11/14/2016 12:47 PM
Last modified:
Uwe Brahm/MPII/DE, 11/24/2016 04:13 PM
  • Moti Medina, 11/16/2016 03:57 PM
  • Moti Medina, 11/15/2016 01:01 PM
  • Moti Medina, 11/14/2016 04:14 PM
  • Moti Medina, 11/14/2016 12:47 PM -- Created document.