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What and Who

Chip Design Goes “Boink”

Ian W. Jones
Max-Planck-Institut für Informatik - D1
AG1 Mittagsseminar (own work)

Ian has a PhD in Electrical Engineering at Imperial College, London.
He was introduced to asynchronous circuit and systems design while
working with Sutherland, Sproull and Associates, Inc.
At Apple Computer he helped develop a software-programmable gate
array chip prototype -- one of his few clocked chip designs.
He joined Sun Labs in 1992, which became Oracle Labs in 2010, where
his research focused on high speed asynchronous circuits, clock
domain crossing circuits, and using Formal Methods to detect bugs
in large hardware designs. Ian has worked closely with designers
in product divisions, applying asynchronous circuit techniques to
help improve their products.
AG 1  
AG Audience
English

Date, Time and Location

Monday, 3 February 2020
13:00
30 Minutes
E1 4
024
Saarbrücken

Abstract

A collection of chip design problems that I have come across.

Contact

Ian Jones
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Ian Jones, 01/29/2020 15:12 -- Created document.