Campus Event Calendar
Event Entry
What and Who
The World’s 3rd Fastest FIFO
Ian Jones
Max-Planck-Institut für Informatik - D1
AG1 Mittagsseminar (own work)
Ian has worked in industrial research labs designing circuits that solve issues in
commercial processor chips. He is an Asynchronologist.
AG 1
AG Audience
English
Note: We use this to send email in the morning.
Date, Time and Location
Thursday, 30 June 2022
13:00
30 Minutes
MPII
024
Saarbrücken
Abstract
First-In, First-Out buffers, FIFOs, are very common data storage components. They are often used at the interfaces between chip modules where speed is critical. I will present a simple FIFO circuit design that is extremely fast.
Contact
Virtual Meeting Details
Zoom
527 278 8807
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logged in users only
Tags, Category, Keywords and additional notes
The talk will take place in a hybrid format. The in-person participants meet in Room 024 at the ground floor in MPII, and the virtual participants meet on the above-mentioned zoom link. If you wish to attend the talk virtually and do not have the password for the zoom room, then contact Roohani Sharma at rsharma@mpi-inf.mpg.de.
Roohani Sharma, 06/23/2022 16:01
Roohani Sharma, 05/27/2022 14:04 -- Created document.
Roohani Sharma, 05/27/2022 14:04 -- Created document.