Ian has a PhD in Electrical Engineering from Imperial College, London. He was introduced to asynchronous circuit and systems design while working with Sutherland, Sproull and Associates, Inc. At Apple Computer he helped develop a software-programmable gate array chip prototype -- one of his few clocked chip designs.
He joined Sun Labs in 1992, which became Oracle Labs in 2010, where his research focused on high speed asynchronous circuits, clock domain crossing circuits, and using Formal Methods to detect bugs in large hardware designs. Ian has worked closely with chip designers in product divisions, applying asynchronous circuit techniques to help improve both the performance and the reliability their products.
Visualisation techniques can enhance the understanding of circuit
behaviour and their operating environment. Visualisation enables
exploration of massive quantities of data from a high-level overview
right down to low-level detail. During the presentation I will show
two short animated movies that address asynchronous clock domain
crossing circuits and whole-chip clock distribution. These
visualisation aids are used to tune and debug chip designs and have
uncovered problems not found by the standard development tools.