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What and Who

Metastability Masking Flip-flops

Ian W. Jones
Max-Planck-Institut für Informatik - D1
AG1 Mittagsseminar (own work)

Ian has a PhD in Electrical Engineering at Imperial College, London.
He was introduced to asynchronous circuit and systems design while
working with Sutherland, Sproull and Associates, Inc.
At Apple Computer he helped develop a software-programmable gate
array chip prototype -- one of his few clocked chip designs.
He joined Sun Labs in 1992, which became Oracle Labs in 2010, where
his research focused on high speed asynchronous circuits, clock
domain crossing circuits, and using Formal Methods to detect bugs
in large hardware designs. Ian has worked closely with designers
in product divisions, applying asynchronous circuit techniques to
help improve their products.
AG 1  
AG Audience
English

Date, Time and Location

Tuesday, 11 August 2020
13:00
30 Minutes
000
000
Saarbrücken

Abstract

A flip-flop is a 1-bit register circuit for storing the logic value sampled at its input.
When the input signal of the flip-flop comes from a different clock domain things can go wrong.
One problem is that the flip-flop can then output a voltage that lies between the logic-0 and
logic-1 values. We call these metastable voltages. Metastable voltages behave like oil and can
penetrate deep into downstream circuits where they can upset circuit operation and even
lead to system failure.
In this talk I describe flip-flop circuit operation and present a new type of flip-flop circuit that
masks metastable voltages from appearing at its output.
Metastability masking flip-flops have direct application in a class of computing circuits called
Metastability-containing circuits where they enable a wider range of computation categories
to be carried out.

Contact

Sándor Kisfaludi-Bak
+49 681 9325 0
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Sándor Kisfaludi-Bak, 08/05/2020 18:06 -- Created document.